A process of implanting ions to a semiconductor wafer for the purpose of changing conductivity, changing a crystalline structure of a semiconductor wafer, or the like, has become a typical semiconductor manufacturing process. An apparatus used in this process is called an ion implantation apparatus. Such an ion implantation apparatus has functions of extracting ions that are ionized in an ion source as an ion beam, then forming an accelerated ion beam, and of conveying the ion beam to a semiconductor wafer so as to be implanted into the semiconductor wafer.
A semiconductor device such as an integrated circuit is formed of a number of transistors and other electronic elements. Typical sizes of a transistor that is currently manufactured is from several dozens of nm to one hundred and several dozens of nm. Within these sizes, ion implantation is performed only on a portion of a transistor, or performed for an adjacent transistor under a different condition in an ion implantation process of a semiconductor manufacturing process. An important thing in this ion implantation process is to perform ion implantation at intended positions satisfying an intended ion implantation condition over an entire plane of a semiconductor wafer.
In a general ion implantation method of the current semiconductor manufacturing process, the same ion energy, ion implantation angle, and dose are set over an entire semiconductor wafer, and based on the setting, an ion beam is formed and accelerated in an ion implantation apparatus, and the ion beam is implanted into the semiconductor wafer. Thus, when only a general ion implantation method is used, a desired ion implantation cannot be conducted at intended positions of a semiconductor wafer.
In order to perform ion implantation at intended positions on a semiconductor wafer using the above-described general ion implantation method, frequently, a resist mask is placed on the semiconductor wafer and then ion implantation is performed through the resist mask. A resist mask is in the form of a thin-film material with a porous structure having a number of extremely small pores. A porous portion of this resist mask is called an ion permeable area, and the other portion is called a resist region. An ion beam radiated on a resist region on the resist mask does not reach a semiconductor wafer, and only an ion beam radiated on an ion permeable region on the resist mask reaches the semiconductor wafer, whereby ions are implanted into the semiconductor wafer. In this manner, ion implantation can be performed at intended positions satisfying an intended ion implantation condition over an entire plane of the semiconductor wafer.
In the above-described general ion implantation method, the same ion energy, ion implantation angle, and dose are set over the entire semiconductor wafer. However, at present, there are also cases in which a special ion implantation method is used in order to make electrical characteristics of a semiconductor element within a wafer plane uniform, throughout an overall semiconductor manufacturing process. It is assumed that, for example, a certain problem occurs in a prior process to an ion implantation process during a semiconductor manufacturing process. Despite the problem, if the manufacturing process progresses without taking any measure, a defect that the electrical characteristics of the semiconductor element within the wafer plane become non-uniform may be caused. Such a defect is called wafer in-plane non-uniformity. In this case, there are cases in which a researched special ion implantation method is used in order to correct the wafer in-plane non-uniformity during the ion implantation process of the semiconductor manufacturing process. For example, by correcting the wafer in-plane non-uniformity that results from a problem arising in a prior process to the ion implantation process in such a way that the doses of ions are intentionally set non-uniform in the wafer plane during the ion implantation process of the semiconductor manufacturing process, uniformity in the electrical characteristics of the semiconductor element in the wafer plane obtained at the end of the semiconductor manufacturing process is secured. This technique can cope with the wafer in-plane non-uniformity attributable to a problem arising in a prior process to an ion implantation process during a semiconductor manufacturing process, but cannot cope with the wafer in-plane non-uniformity attributable to such a problem when the problem unexpectedly arises in a posterior process to the ion implantation process.
An important thing herein is that setting the same ion energy, ion implantation angle, and dose over an entire semiconductor wafer is required in the general ion implantation method of the semiconductor manufacturing process. Herein, particularly, securing uniformity of ion implantation angles will be described.
In general, various techniques of implanting ions over an entire plane of a semiconductor wafer are considered. As one technique that is the most easily understandable, a technique of implanting ions over an entire plane of a semiconductor wafer by performing two-dimensional scanning using an ion beam is considered. This technique had been used in ion implantation apparatuses of the past, but at present, is not used in ion implantation apparatuses for semiconductor wafers having a diameter of 200 mm or 300 mm that are mostly used as semiconductor wafers. One of the reasons is, as semiconductor elements are miniaturized, an allowable range of an error in ion implantation angles has become strict when it compared to the past. Another reason is that it is difficult to secure uniformity in ion implantation angles over an entire plane of a semiconductor wafer of which the radius has become larger when it compared to the past.
Particularly, to describe the latter reason, the following is required to set ion implantation angles to be uniform while two-dimensional scanning using an ion beam for, for example, a semiconductor wafer having a diameter of 300 mm is performed. A first electromagnetic device (beam deflecting/beam scanning device, or the like), which performs two-dimensional scanning using an ion beam and uses at least one of a magnetic field or an electric field, is installed in a beam line between an ion source and a semiconductor wafer. On the downstream side of this first electromagnetic device, a stereoscopic space having a sectional area of at least 300 mm×300 mm is secured. Then, an angle of a two-dimensionally scanned ion beam is controlled according to a two-dimensional position in this stereoscopic space, and the ion beam of which the angle is controlled is conveyed to the wafer to implant ions thereto. In order to control the angle of the ion beam, a second electromagnetic device (beam deflecting/beam scanning device, or the like), which uses at least one of a magnetic field or an electric field to perform two-dimensional angle control of an ion beam, is used.
In reality, however, there are problems of the influence of disorder in a magnetic field or an electric field of the first and second electromagnetic devices, the influence of an angle broadening effect of an ion beam caused by a space-charge effect based on electric charges of the ion beam itself that the ion beam potentially has, and a difficulty in securing performance required for ion implantation other than an ion implantation angle. Due to the above problems, when a semiconductor wafer having a diameter of 200 mm or 300 mm that is mostly used as a semiconductor wafer is used, a function of setting ion implantation angles to be uniform while two-dimensional scanning using an ion beam is performed is very difficult to be realized, except when the size of a semiconductor wafer is small.
To summarize the above description, it is very difficult to make ion implantation angles uniform over an entire plane of a semiconductor wafer having a diameter of 200 mm or 300 mm by performing two-dimensional scanning technique using an ion beam. Even if it is possible, a huge amount of cost is required, which is not realistic. In addition, a use of semiconductor wafers having a diameter of 450 mm is expected at present. It is needless to say that securing uniformity in ion implantation angles over an entire plane of the semiconductor wafer having a diameter of 450 mm further intensifies the difficulty.
On the other hand, making ion implantation angles uniform in one-dimensional direction of a semiconductor wafer having a diameter of 200 mm or 300 mm by performing one-dimensional scanning technique using an ion beam is relatively easy. Further, in order to implant such an ion beam over an entire plane of a semiconductor wafer maintaining the same ion implantation angle, it is better to move the wafer in a direction orthogonal to the scanning direction with the ion beam, which is also relatively easy. In reality, an ion implantation apparatus has been provided, in which ions generated from an ion source are conveyed to a semiconductor wafer as an ion beam, and while the scanning with the ion beam is carried out in a uniaxial direction in a reciprocating manner during the conveyance, the wafer is continuously mechanically scanned (moved) in a direction orthogonal to the scanning direction with the ion beam. Such an ion implantation apparatus has been widely used as an ion implantation apparatus for semiconductor wafers having a diameter of 200 mm or 300 mm that are mostly used as semiconductor wafers.
An important thing herein is that it is better to operate a wafer in a direction orthogonal to the scanning direction of an ion beam while the scanning with the ion beam is carried out in a uniaxial direction in a reciprocating manner in order to maintain the same ion implantation angle in a wafer plane, and thus consecutive scanning (moving) of a wafer is not a necessary condition. In the above-described general ion implantation method, consecutive scanning of a semiconductor wafer is performed to set the same dose of ions over the entire semiconductor wafer. However, if maintenance of the same ion implantation angle is merely aimed, ion implantation angles may be maintained to be the same in any methods in which ion implantation is performed by intermittently moving a semiconductor wafer, and in which ion implantation is performed by fixing a semiconductor wafer, then the semiconductor wafer is moved, and then ion implantation is performed by fixing the semiconductor wafer at another position.
To be described later, in the present invention, it is possible to create ion implantation regions and non-ion-implantation regions having a length of several mm or longer within a wafer plane, but as one example showing the necessity of creating such ion implantation regions and non-ion-implantation regions, there is correction for wafer in-plane non-uniformity in a semiconductor manufacturing process.
In an ion implantation process of a semiconductor manufacturing process, for example, there are cases in which a problem occurs and accordingly a semiconductor wafer that has undergone non-uniform ion implantation is made, but in the above-described general ion implantation method, the correction is not made. In other words, it is necessary for a semiconductor wafer that has already undergone ion implantation but experienced non-uniform implantation of ions to create ion implantation regions and non-ion-implantation regions within a wafer plane in order to perform the correction using the same ion implantation.
In addition, if, during a semiconductor manufacturing process, the manufacturing process progresses without change even though a problem occurs unexpectedly in a posterior process to an ion implantation process, there are also cases in which a semiconductor wafer in which the electrical characteristics of a semiconductor element within the wafer plane are non-uniform is made. In this case, correcting the electrical characteristics is considered in such a way that the semiconductor manufacturing process is stopped first, and an ion implantation process is performed again only for a portion in which non-uniformity of the electrical characteristics is generated within the semiconductor wafer or a new ion implantation process is added. However, also in this case, the correction of the electrical characteristics cannot be performed using the above-described general ion implantation method. In other words, also in this case, it is necessary to create ion implantation regions and non-ion-implantation regions within a wafer plane.
The occurrence of the wafer in-plane non-uniformity is attributable to a mechanical problem or an electromagnetic problem of a semiconductor manufacturing apparatus during a semiconductor manufacturing process, resulting in wafer in-plane non-uniformity having a sufficiently large length range in comparison to a semiconductor element. In other words, when ion implantation regions and non-ion-implantation regions are created within a wafer plane and are used in correcting the wafer in-plane non-uniformity of the semiconductor manufacturing process, the minimum length of a region of the typical ion implantation region may be 10 mm or longer. The maximum length of a region may be 50 mm or shorter, and when ion implantation is performed in a region having the length or longer, a plurality of ion implantation regions may be combined.
Note that ion implantation regions and non-ion-implantation regions are created within a wafer plane and used in correcting wafer in-plane non-uniformity of a semiconductor manufacturing process is one example, and various kinds of applications are considered by creating ion implantation regions and non-ion-implantation regions in the wafer plane. An important thing herein is that the performance of ion implantation in an ion implantation region should be the same as that of the above-described general ion implantation method. In other words, the ion energy, ion implantation angle, and dose should be controlled to a certain degree of accuracy. In addition, also when ion implantation regions are scattered within a wafer plane, and when intended ion implantation is the same in each of the ion implantation regions, the ion implantation angle, and the dose in each of the ion implantation regions are required to be uniform. In addition, the external environment in ion implantation should be the same as in the above-described general ion implantation method. In other words, the level of metal contamination, the level of cross contamination, the level of ion energy contamination, the level of the number of particles, and the like, which are deemed to be important in an ion implantation process of a semiconductor manufacturing process, should be the same as those in the above-described general ion implantation method. Herein, the level of metal contamination is the amount of various kinds of metal atoms implanted in a semiconductor wafer during ion implantation, and the level of cross contamination is the amount of ions in atoms other than the kinds of target atoms implanted in a semiconductor wafer during ion implantation. The level of ion energy contamination is the amount of ions which are implanted in a wafer during ion implantation having energy different from a target energy. The level of the number of particles is the amount of substances conveyed onto the surface of a wafer during ion implantation.
In an ion implantation process of a general semiconductor manufacturing process, a resist mask that has already been described is used in order to create ion implantation regions and non-ion-implantation regions within a wafer plane. The resist mask can create ion implantation regions and non-ion-implantation regions with very high accuracy, but cost thereof is very high, and posterior processes are very complicated. Thus, the resist mask is not appropriate for an object of the present invention that ion implantation regions and non-ion-implantation regions having a length of several mm or longer are created within a wafer plane.
In the related art, as a technique for creating ion implantation regions in a given portion on a semiconductor wafer, a technique in which a mask made of a metal material or a carbon material having a number of holes is used so as to radiate only a beam that passed through the hole portion of the mask onto a semiconductor wafer without using a resist mask has been used. Such a mask having a number of holes is called a stencil mask. When such a stencil mask is used, the area and the position of an ion implantation region are decided by the size and the position of the hole portion of the stencil mask. As a method using the stencil mask, for example, there is the technique disclosed in JP-A-H08-213339 (Patent Document 1).
On the other hand, a technique of creating ion implantation regions having two-dimensional distribution on a semiconductor wafer using a plurality of movable masks installed on an ion implantation apparatus without using a resist mask or a stencil mask has also been proposed in JP-A-2001-229872 (Patent Document 2).
When a stencil mask is used, in order to realize ion implantation in which the areas and positions of ion implantation regions differ, it is necessary to prepare stencil masks that satisfy each condition, and an operation of replacing stencil masks for each time of ion implantation is required. In the technique of the Patent Document 1, the plurality of stencil masks are prepared, but since the areas and positions of required ion implantation regions are considered to be diversified, the replacement of stencil masks is essential, and as a result, enormous cost and preparation time are required.
In the technique of the Patent Document 2, the replacement of stencil masks is not necessary as a movable mask is used, but since an ion beam is radiated directly to the mask, the effect on the mask remains. Specifically, previously, the level of cross contamination worsens due to the effect of the type of ions radiated on a mask. In addition, the level of ion energy contamination worsens due to the effect of degassing arising from a mask caused by radiation of an ion beam. Further, the level of the number of particles worsens due to the effect of the particles deriving from a mask. In addition, when a metal material is used as a mask material, the level of metal contamination also worsens. In other words, the external environment during ion implantation cannot be said to be the same as that in the above-described general ion implantation method.
In addition, in the technique of the Patent Document 2, since an ion beam is radiated directly to a movable mask, a constituent material of the movable mask is sputtered by the ion beam or sublimated due to radiation heat of the ion beam as time elapses, the shape of the movable mask gradually changes, and as a result, the movable mask should be replaced. Thus, though not to the extent of using a stencil mask, cost for replacing the movable mask resultantly incurs, and a preparation time is also required.
Further, in the technique of the Patent Document 2, it is necessary to perform two-dimensional scanning using an ion beam. Thus, the technique of the Patent Document 2 cannot be adopted to an ion implantation apparatus that does not have the function of two-dimensional scanning using an ion beam.
In addition, in the technique of the Patent Document 2, it is necessary to perform two-dimensional scanning using an ion beam, but it is difficult to make ion implantation angles within a wafer plane uniform in the first place in the two-dimensional scanning using an ion beam as already described. Thus, in the technique of the Patent Document 2, when ion implantation regions are scattered within a wafer plane, the ion implantation angles in each ion implantation region are not uniform.
In addition, in the techniques of the related art, since only ion implantation regions with the same dose can be created within a wafer plane in one time of a series of ion implantations, when the plural types of ion implantation regions with different doses are to be created within a wafer plane, it is necessary to perform ion implantation plural times, whereby the productivity deteriorates. One time of a series of ion implantations refers to an ion implantation process in which ion implantation beginning from one end of a wafer in a diameter direction continues until it reaches the other end of the wafer in the diameter direction.